;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.3.3 Sun Nov 18 12:40:39 2007

;--------------------------------------------------------
	.module main
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _main
	.globl _czekaj
	.globl _u12
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; special function bits 
;--------------------------------------------------------
_t1	=	0x00b4
;--------------------------------------------------------
; overlayable register banks 
;--------------------------------------------------------
	.area REG_BANK_0	(REL,OVR,DATA)
	.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area	OSEG    (OVR,DATA)
;--------------------------------------------------------
; Stack segment in internal ram 
;--------------------------------------------------------
	.area	SSEG	(DATA)
__start__stack:
	.ds	1

;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
_u12	=	0x8000
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG   (XDATA)
;--------------------------------------------------------
; interrupt vector 
;--------------------------------------------------------
	.area CSEG    (CODE)
__interrupt_vect:
	ljmp	__sdcc_gsinit_startup
	reti
	.ds	7
	reti
	.ds	7
	reti
	.ds	7
	reti
	.ds	7
	reti
	.ds	7
	reti
	.ds	7
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
__sdcc_gsinit_startup:
	mov	sp,#__start__stack - 1
	lcall	__sdcc_external_startup
	mov	a,dpl
	jz	__sdcc_init_data
	ljmp	__sdcc_program_startup
__sdcc_init_data:
;	_mcs51_genXINIT() start
	mov	a,#l_XINIT
	orl	a,#l_XINIT>>8
	jz	00003$
	mov	a,#s_XINIT
	add	a,#l_XINIT
	mov	r1,a
	mov	a,#s_XINIT>>8
	addc	a,#l_XINIT>>8
	mov	r2,a
	mov	dptr,#s_XINIT
	mov	r0,#s_XISEG
	mov	p2,#(s_XISEG >> 8)
00001$:	clr	a
	movc	a,@a+dptr
	movx	@r0,a
	inc	dptr
	inc	r0
	cjne	r0,#0,00002$
	inc	p2
00002$:	mov	a,dpl
	cjne	a,ar1,00001$
	mov	a,dph
	cjne	a,ar2,00001$
	mov	p2,#0xFF
00003$:
;	_mcs51_genXINIT() end
	.area GSFINAL (CODE)
	ljmp	__sdcc_program_startup
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME    (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
__sdcc_program_startup:
	lcall	_main
;	return from main will lock up
	sjmp .
;------------------------------------------------------------
;Allocation info for local variables in function 'czekaj'
;------------------------------------------------------------
;------------------------------------------------------------
;main.c:4: void czekaj(void)
;	-----------------------------------------
;	 function czekaj
;	-----------------------------------------
_czekaj:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
;main.c:7: for (i = 0; i<1000; i++);
;     genAssign
	mov	r2,#0xE8
00103$:
;     genDjnz
;       Peephole 132   changed ljmp to sjmp
;       Peephole 205   optimized misc jump sequence
	djnz r2,00103$
00108$:
00109$:
00104$:
	ret
;------------------------------------------------------------
;Allocation info for local variables in function 'main'
;------------------------------------------------------------
;onoff                     Allocated to registers r2 
;glosnik                   Allocated to registers r3 
;i                         Allocated to registers 
;------------------------------------------------------------
;main.c:11: void main(void)
;	-----------------------------------------
;	 function main
;	-----------------------------------------
_main:
;main.c:13: unsigned char onoff = 1;
;     genAssign
	mov	r2,#0x01
;main.c:14: unsigned char glosnik = 0;
;     genAssign
	mov	r3,#0x00
;main.c:15: unsigned int i = 0;
00112$:
;main.c:18: if ((u12 & 0x0f) != 0x0f)
;     genAssign
	mov	dptr,#_u12
	movx	a,@dptr
	mov	r4,a
;     genAnd
	anl	ar4,#0x0F
;     genCmpEq
	cjne	r4,#0x0F,00121$
;       Peephole 132   changed ljmp to sjmp
	sjmp 00105$
00121$:
;main.c:20: if (onoff)
;     genIfx
	mov	a,r2
;     genIfxJump
;       Peephole 110   removed ljmp by inverse jump logic
	jz  00102$
00122$:
;main.c:22: onoff = 0;
;     genAssign
	mov	r2,#0x00
;       Peephole 132   changed ljmp to sjmp
	sjmp 00105$
00102$:
;main.c:24: onoff = 1;
;     genAssign
	mov	r2,#0x01
00105$:
;main.c:27: if (onoff)
;     genIfx
	mov	a,r2
;     genIfxJump
;       Peephole 110   removed ljmp by inverse jump logic
	jz  00110$
00123$:
;main.c:29: if (glosnik == 0)
;     genCmpEq
;       Peephole 132   changed ljmp to sjmp
;       Peephole 199   optimized misc jump sequence
	cjne r3,#0x00,00107$
;00124$:
;       Peephole 200   removed redundant sjmp
00125$:
;main.c:31: glosnik = 1;
;     genAssign
	mov	r3,#0x01
;main.c:32: t1 = 1;
;     genAssign
	setb	_t1
;       Peephole 132   changed ljmp to sjmp
	sjmp 00110$
00107$:
;main.c:34: glosnik = 0;
;     genAssign
	mov	r3,#0x00
;main.c:35: t1 = 0;
;     genAssign
	clr	_t1
00110$:
;main.c:38: czekaj();
;     genCall
	push	ar2
	push	ar3
	lcall	_czekaj
	pop	ar3
	pop	ar2
;       Peephole 132   changed ljmp to sjmp
	sjmp 00112$
00114$:
	ret
	.area CSEG    (CODE)
	.area XINIT   (CODE)
